NAND Only Implementation
In this activity, we simulated and built a circuit that replicated AOI designs of booths and alarms using only NAND gates.
Conclusion:
1. For your AOI implementation, how many ICs (i.e., 74LS08, 74LS04, and 74LS32 chips) were required to implement your circuit? Note: You’re not just counting the number of gates used, but rather, the number of IC, in whole or part, that were required.
4
2. For your NAND implementations, how many ICs (i.e., 74LS08, 74LS04, and 74LS32 chips) were required to implement your circuits?
4
3. In terms of hardware efficiency, how does the NAND implementation compare to the AOI implementation?
The NAND only implementation allows us to only manipulate and worry about one kind of gate. This makes a NAND implementation more convenient.
4. NAND gates are available with three inputs (74LS10) and four inputs (74LS20). Could either of these chips have been used for this design? If so, how would it have affected the efficiency of the design?
It would have allowed us to merge three inputs simultaneously, an operation we had to do in our design. This would cut down on the total amount of gates used this increasing efficiency.
1. For your AOI implementation, how many ICs (i.e., 74LS08, 74LS04, and 74LS32 chips) were required to implement your circuit? Note: You’re not just counting the number of gates used, but rather, the number of IC, in whole or part, that were required.
4
2. For your NAND implementations, how many ICs (i.e., 74LS08, 74LS04, and 74LS32 chips) were required to implement your circuits?
4
3. In terms of hardware efficiency, how does the NAND implementation compare to the AOI implementation?
The NAND only implementation allows us to only manipulate and worry about one kind of gate. This makes a NAND implementation more convenient.
4. NAND gates are available with three inputs (74LS10) and four inputs (74LS20). Could either of these chips have been used for this design? If so, how would it have affected the efficiency of the design?
It would have allowed us to merge three inputs simultaneously, an operation we had to do in our design. This would cut down on the total amount of gates used this increasing efficiency.